A fundamental function of digital data receivers such as fiber optic receivers is to discriminate between different values of some characteristic of the received signal in order to distinguish a logic ONE from a logic ZERO. A fiber optic receiver, for example, must discriminate between two intensities of the received light signal. This function is difficult to perform for many reasons. The absolute levels of the signal may vary substantially due to factors such as the length of the transmission path, the number and quality of couplings in the path, and normal tolerances and aging of optical and electrical components along the path. Digital data receivers therefore must be able to operate over a wide range of input signal levels.
One general approach to designing receivers to accommodate widely-varying input signals is to AC couple a front-end transducer, such as a PIN diode in a fiber optic receiver, to subsequent amplifier stages. This AC coupling is achieved by placing a series capacitor between the transducer and the amplifier. AC coupling has the effect of filtering out the average DC component of the received signal, regardless of its magnitude. Subsequent amplifier stages are typically high-gain stages designed to amplify small AC signals, i.e., signals having an average DC content of zero volts.
AC coupling has drawbacks that make it unattractive for use with unconditioned digital data. Digital data as a general rule has no fixed average DC level; its average level can vary from near zero in a long string of ZEROs to near some maximum voltage in a long string of ONEs. The average level can also change quickly, because data tends to be transmitted in bursts. If AC coupling were to be employed with such data, data bits occurring near steep changes in the average DC value would be undetectable, because the DC component of the signal would saturate the input of the subsequent amplifier stage until the coupling capacitor became charged. These problems with AC coupling can be overcome by using a preamble to prepare the receiver for incoming data, or by encoding the data such that the transmitted data has a more consistent average DC value. However, both of these methods add to the transmission delay of the data; in some computer interconnect, this added delay may be unacceptable. These methods also may unduly increase the design complexity of the receiver.
Another general approach is to employ DC coupling in digital data receivers. Because the input signal is directly coupled to the amplifier stages in a DC coupled receiver, the problems of charging and discharging a coupling capacitor are eliminated. However, DC coupling schemes must still accommodate signal levels and average DC values that vary widely. Therefore DC coupling schemes generally require some way of adjusting the switching threshold separating logic ONEs and ZEROs.
A popular configuration for DC coupled receivers employs a pair of peak detectors to detect the most positive and most negative excursions of the received signal, and to hold these values for long enough to be used throughout a subsequent data transmission. A voltage divider is employed at the outputs of the peak detectors to generate a voltage midway between the two extremes that represents the desired switching threshold. The output of the voltage divider is typically connected along with the received signal to the input of a differential amplifier. When the signal subsequently exceeds the threshold, the output of the differential amplifier is a logic ONE; when the signal is less than the threshold, the output of the differential amplifier is a logic ZERO.
A peak detector of the type used in DC coupled receivers is a special type of voltage-following amplifier, and is therefore akin to other such amplifiers, such as track-and-hold amplifiers widely used in electronic signal processing. These amplifiers typically employ a storage capacitor to hold a value of the input signal for some time. In a peak detector, the held value is a peak value, while in track-and-hold amplifiers, it is merely the value of the input signal at the time that a HOLD signal becomes asserted. The storage capacitor is typically charged through a switching element such as a diode or the base-emitter junction of a bipolar transistor. When the switching element is ON, it enables current to flow to the capacitor, allowing its voltage to follow that of the input signal. When the switching element is OFF, current flow is disabled.
It is generally advantageous for the voltage-following circuit to be able to switch between ON and OFF rapidly. First of all, this allows the circuit to operate on higher-frequency signals, such as those present in a fiber optic data link. Also, rapid switching contributes to greater accuracy in sampling the input signal. During switching, the storage capacitor may continue to charge, so that the stored voltage is slightly different from the input voltage to be held. In a peak detector, for example, this additional charge causes the output to vary from the true peak by perhaps tens of millivolts. This can be a significant error, especially when the input signal level is of the same order. Furthermore, the amount of this error varies with the average DC level of the data, and therefore cannot be compensated for a priori. Decreasing the switching time of the circuit can diminish this erroneous charging of the storage capacitor.